EDUCATIONAL QUALIFICATIONS
- B.Tech – Government College of Technology, Coimbatore (1991- 1995)
- M.Tech – Indian Institute of Technology Bombay (2010-2012)
- Ph. D– Indian Institute of Technology Bombay (2014 – 2018)
RESEARCH INTEREST:
- VLSI digital system design
- Fault tolerant Architecture
- Reconfigurable hardware
- Processor design and Micro-architecture
WORK EXPERIENCE:
- Design Engineer, M/s Crompton Greaves, Chennai – Nov 1995 – Nov 1996
- Lecturer, LokamanyaTilak College of Engineering, Navi Mumbai – Jan 1998 to Dec 1998
- Assistant Professor, K.J. Somaiya College of Engineering, Vidyavihar, Mumbai – Jan 2006 – Jul 2019
- Associate Professor, Muthoot Institute of Technology and Science, Varikoli, Kochi – Jul 2019 to present
COURSE OFFERED:
UG Theory Courses
- Basic Electrical and Electronics Engineering
- Basic Electronic Circuits
- Hardware Description Language Laboratory
- Control System Engineering
- Electrical Networks
- Linear Integrated Circuit Design
- Basic VLSI Design
- Embedded Systems & RTOS
PG Theory Courses
- Advance Computer Architecture
ACHIEVEMENTS:
- Ph. D Thesis selected and presented for McClusskey Best Doctoral Thesis Award Contest in 24th IEEE European Test Symposium 2019 (ETS), Baden Baden, Germany from 27th – 31th May 2019
- Registered reviewer of manuscript in JOURNAL OF ELECTRONIC TESTING: THEORY AND APPLICATIONS (JETTA)
- Organizing team member of 24th IEEE Asian Test Symposium at IIT Bombay, from 22nd – 25th Nov 2015
- Organizing team member of 27th IEEE VLSI Design 2014 Conference at IIT Bombay, from 5th – 9th Jan 2014
PUBLICATIONS:
Journal:
- Shoba Gopalakrishnan and Virendra Singh. “Soft-Error Reliable Fault Tolerant Architecture for Future Chips”, Computers & Digital Techniques IET, vol. 13, no. 3, pp. 233-242, 2019.
Conferences:
- Shoba Gopalakrishnan and Virendra Singh, ” REMORA: A hybrid low-cost soft-error reliable fault tolerant architecture “, 30th IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT) ,23rd – 25th October 2017, pp. 1-6, Cambridge, United Kingdom
- Shoba Gopalakrishnan and Virendra Singh. “REMO: Redundant Execution with Minimum Area,Power, Performance Overhead Fault Tolerant Architecture”, 22nd IEEE International Symposium on On-Line Testing and Robust System Design (IOLTS) , 4-6 July 2016, pp. 109 – 114, Spain.
- Ms Shoba G, Mr. Harshitkumar.L.Jain “Voice Interactive System for College Automation” Paper presented in National Conference on “Emerging Trends in Computers, Communication and Information Technology” in association with IEEE, ISTE,IETE and CSI at K.J. Somaiya College of Engineering, Mumbai on March 20 – 21, 2009.
