CURRICULUM & SYLLABUS

Kerala Technological University (KTU):

Semester	Syllabus
SEMESTER I & II	Curriculum	Syllabus
SEMESTER III & IV	Curriculum	Syllabus
SEMESTER V & VI	Curriculum	Syllabus
SEMESTER VII & VIII	Curriculum	Syllabus

FOUR STREAMS IN THE DEPARTMENT OF ECE

STREAM	STREAM HEAD
EMBEDDED SYSTEMS	Dr. Arunkant A. Jose
VLSI	Dr. Shoba Gopalakrishnan
COMMUNICATION	Dr. Dhanya S
SIGNAL PROCESSING	Dr. Arun Joy

ADD-ON COURSES

Certified By

Year	Sl.No.	Course offered by	Title	Start date	End date	Duration	No.of students
2023	1	L&T CollegeConnect	Cyber Physical System for industrial applications	06-03-2023	20-06-2023	16 weeks	39 [S8(2019-23 batch)& S6(2020-24 batch]
	1	L&T CollegeConnect	AI and Edge computing	06-03-2023	20-06-2023	16 weeks	24[S8(2019-23 batch)& S6(2020-24 batch]
	2	ENTUPLE TECHNOLOGIES Pvt Ltd	IoT Analytics and Data Sciences	10-03-2023	18-04-2023	40 hours	59 [S8(2019-23 batch)& S6(2020-24 batch]
2022	1	CDAC	Cyber and Information Security	30-11-2021	30-06-2022	40 hours	52 [S7(2018-22 batch) – 52]
2022	2	IBM	IBM Internet of Things	01-01-2022	24-06-2022	40 hours	58 [S5(2019-23 batch) – 58]
2021	1	ENTUPLE TECHNOLOGIES Pvt Ltd (Online)	1. IoT Analytics and Data Science 2. Advanced Analytics and Machine Learning	19-01-2021	23-04-2021	30 hours +30 hours	110 [S7(2017-21 batch) – 60/S5(2018-22 batch) – 50]
2020	1	ENTUPLE TECHNOLOGIES Pvt Ltd (Online)	Electromagnetics,Microwave, RF and Antenna Design	13-07-2020	02-02-2021	50 hours	22 [S8(2016 -20 batch) -1/S6(2017-21 batch) – 21]
	2	IEEE blended learning (Embedded) (Online)	1. Embedded Computing for IoT Systems 2. Embedded Sense for IoT Systems	19-03-2020	19-03-2021	30 hours +30 hours	44 [S8(2016 -20 batch) – 22/S6(2017-21 batch) – 22]
	3	Dept.of ECE, MITS	Mathematical foundations for Machine learning & An introduction into classifiers with Matlab	10-10-2020	22-10-2020	30 hours	42 [S8(2016 -20 batch) – 26/S6(2017-21 batch) – 16]
2018	1	IEEE blended learning (Embedded)	1. Logic Design for VLSI Engineers 2. RTL Design using Verilog HDL 3. ASIC Design Flow	01-10-2018	25-10-2018	40 hours	51 [S7(2014 -18 batch) – 26/S5(2015-29 batch) – 16]
2017	1	IEEE blended learning (Embedded)	Logic Design for VLSI Engineers (GA 02)	01-03-2017	28-03-2017	40 hours	32 [S8(2013 -17 batch) – 26/S6(2014-18 batch) – 16]

STUDENTS' PROJECTS

Final Year Projects 2016-20 Batch

INNOVATIONS IN TEACHING AND LEARNING BY FACULTY

Moodle learning platform was incorporated for effective learning environment for the courses handled. This platform was used to share lecture materials, conducted quizzes and evaluations. Please find below the URL of the Moodle courses http://103.214.233.57/
Conventional “stand alone” experiment based lab were converted to “Experiential learning lab” sessions.
Department runs Add-On courses beyond the class hours for enhanced learning
“Faculty for students seminar series” for enhancing student knowledge.
Students are encouraged to select projects and design projects that lead to developing “Social engineering solutions” to be aligned with the current societal scenario and also keep in pace with the technological advancements.
- Project Theme
- Design Project 2018-19, 2019-20
Course material developed by faculty – Handbook on OPAMP